Over the course of 7 years, the Microsystems Research Center of MIT undertook a series of advanced research inquiries in early Very Large Scale Integrated-circuit (VLSI) technology. Publicized as 428 unique papers documenting their research in three distinct phases, fifteen MIT faculty and dozens of others worked tirelessly to achieve this relatively obscure body of work which culminated in the design and fabrication of three unique chips. A detailed summary can be found by reading the final report "A Coherent VLSI Design Environment".

Currently only a small number of these papers have been excavated from the MIT Archives with the studious help of the staff there. There presently remains the challenge of correctly converting RCA titles into their correct form.

The initial proposal made by Professor Paul Penfield was made on January 4th, 1980 and is the first memo "Integrated Circuit Series" 80-1.

Here, Penfield states that the goal of the series was to “disseminate recent results and ideas in various stages of development to others at M.I.T. who may be interested.” The remainder of the memo is dedicated to describing how memos will be handled and published (if at all), along with general guidelines for writing.

Several memos were published this day and within the following few months.

80-1 "Integrated Circuit Series," Paul Penfield, Jr., January 1980. (4 pp.)
80-2 "Using APL on the Speech System 20," Paul Penfield, Jr., January 1980. (7 pp.)
80-3 "Design Considerations for a Partial Differential Equation Machine," Arvind and Randal E. Bryant, January 1980. (10 pp.)
80-4 "Information Transfer and Area-Time Tradeoffs for VLSI Multiplication," Harold Abelson and Peter Andreae, January 1980. (9 pp.)
80-5 "A Monolithic Moisture Sensor," Kou Togashi and Stephen D. Senturia, January 1980. (9 pp.)
80-6 "The SCHEME-79 Chip," Jack Holloway, Guy L. Steele, Gerald J. Sussman, and Alan Bell, January 1980. (43 pp.)
80-7 "MOSSIM: A Logic-Level Simulator for MOS LSI. User's Manual Version 2," Randal E. Bryant, February 1980. (19 pp.)
80-8 "The Implementation of Regular Logic with Feedback Reduced PLAs," Lance A. Glasser, February 1980. (5pp.)
80-9 "Reflections on AIDS-79," Paul Penfield, Jr., March 1980. (4 pp.)

In the final report this first phase of research is listed as beginning on the 12 May, 1980 and ending 2 years to the day on the 11th of May, 1982.

80-10 "Student Guide to VLSI Research at M.I.T.," Paul Penfield, Jr., Revised yearly. (15 pp.)
80-11 "Introduction to the Design Rule Checker," Larry Seiler, March 1980. (3 pp.)
80-12 "Geometrical Primitive Objects for Integrated Circuit Specification," Larry Seiler, March 1980. (6 pp.)
80-13 "The Cost of Designing for Testability in Terms of Integrated Circuit Yield," Lance A. Glasser, March 1980. (9 pp.)
80-14 "AIDS-79 User's Manual," Paul Penfield, Jr., March 1980. (37 pp.)
80-15 "The Nature of VLSI Circuit Design," Lance A. Glasser, May 1980. (5 pp.)
80-16 "Artwork Analysis Tools for VLSI Circuits," Clark M. Baker, June 1980. (75 pp.)
80-17 "An Integrated Circuit Two-Phase Programmable Clock Generator," Fasal Abbas, June 1980. (81 pp.)
80-18 "A Microprocessor-Compatible Charge-Flow Transistor Oscillator," Harvey W. Jong, June 1980. (55 pp.)
80-19 "The Design of Integrated Distributed Amplifiers," Jeffrey C. McHarg, June 1980. (95 pp.)
80-20 "Documentation of the RSA Chip Assembler," Ronald L Rivest, July 1980. (27 pp.)
80-21 "MOSSIM: A Logic-Level Simulator for MOS LSI - User's Manual," Randal E. Bryant, July 1980. (19 pp.)
80-22 "A VLSI Implementation of a Two-by-Two Packet Router," Paul S. Ries, July 1980. (98 pp.)
80-23 "A Test Generation Technique for Devices Without Gate-Level Descriptions," Robert A. Todd, July 1960. (50 pp.)
80-24 "An Algorithm for MOS Logic Simulation," Randal E. Bryant, July 1980. (16 pp.)
80-25 "An Interactive PLA Generator as an Archetype for a New VLSI Design Methodology," Lance A. Glasser and Paul Penfield, Jr., July 1980. (16 pp.)
80-26 "A Processing Element for a Large Multiple Processor Dataflow Machine," Arvind, Vinod Kathail, and Keshav Pingali August 1980. (5 pp.)
80-27 "A Polynomial Time Algorithm for Optimal Routing Around a Rectangle," Andrea S. LaPaugh, August 1980. (28 pp.)
80-28 "Conversion of Algorithms to Custom Integrated Circuits: An M.I.T. Perspective," Jonathan Allen, August 1980. (3 pp.)
80-29 "Report on the NBS/JPL/USC-ISI Test Chip Workshop, Pasadena, California, August 20, 1980," Mark G. Johnson, September 1980. (28 pp.)
80-30 "Tool for Verifying Integrated Circuit Designs," Clark Baker and Chris Terman, September 1980. (28 pp.)
80-31 "The Design Procedure Language Manual," John Batali and Anne Hartheimer, September 1980. (81 pp.)
80-32 "The Definition and Implementation of a Computer Progamming Language Based on Constraints," Guy L. Steele, Jr., December 1980. (371 pp.)
80-33 "VLSI Design Automation Activities at M.I.T.," J. Alle and P. Penfield, Jr., Rev. July 1981. (30 pp.)
80-34 "Addendum to AIDS-79 User's Manual," Paul Penfleld, Jr., October 1980. (9 pp.)
80-35 "LSIAA: LSI Artwork Analysis System," Gary E. Kopec, November 1980. (16 pp.)
80-36 "The Analog Behavior of Digital Integrated Circuits," Lance A. Glasser, December 1980. (10 pp.)
80-37 "Architectures for Analog LSI Implementations of Speech Processing Systems," Patrick W. Bosshart, December 1980. (186 pp.)
80-38 "Algorithms for Integrated Circuit Layout: An Analytic Approach," Andrea S. LaPaugh, December 1980. (179 pp.)
80-39 "The Apiary Network Architecture for Knowledgeable Systems," Carl Hewett, December 1980. (11 pp.)

81-40 "Signal Delay in RC Tree Networks," Jorge Rubinstein, Paul Penfield, Jr. and Mark A. Horowitz, January 1981. (7 pp.)
81-41 "Special Purpose Hardware for Design Rule Checking." Larry Seiler, February 1981. (20 pp.)
81-42 "Electron Beam Testing and Restructuring of Integrated Circuits," D. C. Shaver, February 1981. (17 pp.)
81-43 "A One Transistor RAM for MPC Projects," James J. Cherry and Gerald L. Roylance, February 1981. (13 pp.)
81-44 "A Multiproject Chip Approach to the Teaching of Analog MOS LSI and VLSI," Yannis P. Tsividis and Dimitri A. Antoniadis, February 1981. (17 pp.)
81-45 "The Scaling of Clock Noise in MOS Integrated Circuits," Lance A. Glasser, March 1981. (4 pp.)
81-46 "New Layouts for the Shuffle-Exchange Graph," Daniel Kleitman, Frank Thomson Leighton, Margaret Lepely and Gary L. Miller, March 1981 (15 pp.)
81-47 "MOSSIM: A Switch-Level Simulator for MOS LSI," Randal Bryant, April 1981. (15 pp.)
81-48 "Signal Delay in MOS Interconnections," Paul Penfield, Jr. and Jorge Rubinstein, April 1981. (15 pp.)
81-49 "MOSFETs on Silicon Prepared by Moving Melt Zone Recrystallization of Encapsulated Polycrystaline Silicon on an Insulating Substrate," E. Maby, M. Geis, Y. LeCoz, D. Silversmith, R. Mountain, and D. A. Antoniadis, May 1981. (13 pp.)
81-50 "A Switch-Level Simulation Model for Integrated Logic Circuits," Randal E. Bryant, June 1981. (219 pp)
81-51 "A Hardware Compiler for Boolean Logic Functions," Douglas D. Williams, June 1981. (53 pp.)
81-52 "A Switch-Level Model of MOS Logic Circuits," Randal E. Bryant, June 1981. (10 pp.)
81-53 "MSHOW: Multi-Media Layout Display Program," Gary E. Kopec, July 1981. (13 pp.)
81-54 "The Impact of VLSI on Signal Processing Algorithms and Architectures," Gary E. Kopec, July 1981. (7 pp.)
81-55 "Principal Values and Branch Cuts in Complex APL," Paul Penfield, Jr., July 1981. (9 pp.)
81-56 "Chopper Stabilization of MOS Operation Amplifiers Using Feed-Forward Techniques," Michael C. W. Coln, July 1981. (16 pp.)
81-57 "AIDS, APL Integrated-Circuit Design System," Paul Penfield, Jr., July 1981. (8 pp.)
81-58 "Optimal Layouts for Small Shuffle-Exchange Graphs," Frank T. Leighton and Gary L. Miller, August 1981. (10 pp.)
81-59 "A Low Temperature Process to Increase the Grain Size in Polysilicon Films," Rafael Reif and Jonathan E. Knott, August 1981. (12 pp.)
81-60 "A Low Temperature Process to Produce Large-Grain Uniformly-Oriented Polycrystalline Silicon Films on Amorphous Substrates," Jonathan E. Knott, August 1981 (50 pp.)
81-61 "HISDL - A Structure Description Language," Willie Y-P. Lim, September 1981. (16 pp.)
81-62 "The Syntactic Analysis of VLSI Systems Using Graphs," Lance A. Glasser, September 1981. (5 pp.)
81-63 "Clocking Semi-Groups for VLSI Circuit Analysis," Lance A. Glasser, September 1981. (4 pp.)
81-64 "Vertical Single-Gate CMOS Inverters on Laser-Processed Multilayer Substrates," G. T. Goeloe, E. Maby, D. J. Silversmith, R. W. Mountain, and D. A. Antoniadis, September 1981. (3 pp.)
81-65 "An Introduction to DPL," John Batali, October 1981. (24 pp.)
81-66 "Optimal Placement for River Routing," Charles E. Leiserson and Ron Y. Pinter, October 1981. (16 pp.)
81-67 "Oxidation Induced Point Defects in Silicon," Dimitri A. Antoniadis, October 1981. (24 pp.)
81-68 "Use of Process and 2-D MOS Simulation in the Study of Doping Profile Influence on S/D Resistance in Short Channel MOSFET's," P. Antognetti, C. Lombardi, and D. Antoniadis, October 1981. (4 pp.)
81-69 "Transmission Diffraction Gratings for Soft X-Ray Spectroscopy and Spatial Period Division," Andrew Michael Hawryluk, October 1981. (182 pp.)
81-70 "Dynamics of Oxygen Incorporation During Czochralski Silicon Growth," David Francis Bliss, November 1981. (69 pp.)

82-71 "New Lower Bounds for Channel Routing," Frank Thomson Leighton, January 1982. (9 pp.)
82-72 "Technology, Strategic Choice, and the Future & Structure of Semiconductor Production," C. H. Ferguson and D. M. Raff, January 1982. (13 pp.)
82-73 "A Placement/Interconnect Channel Router. Cutting Your PI into Slices,"James Joseph Koschella, February 1982. (45 pp.)
82-74 "The PI (Placement and Interconnect) System," Ronald L. Rivest, February 1981. (12 pp.)
82-75 "A 'Greedy' Channel Router," Ronald L. Rivest and Charles M. Fiduccia, February 1982. (11 pp.)
82-76 "DYCHAR: A Channel Router Which Uses Dynamic Channel Assignment," Seth D. Alford, February 1982. (92 pp.)
82-77 "Benchmark Channel-Routing Problems," Ronald L. Rivest, February 1982. (8 pp.)
82-78 "Electrical Properties of Line Defects in Thin Zone-Recrystallized Silicon Films on Silicon Dioxide," E. W. Maby and D. A. Antoniadis, February 1982. (13 pp.)
82-79 "A Canary Straw Bird," Lance A. Glasser, February 1982. (8 pp.)
82-80 "SPICE," Lance A. Glasser, March 1982. (113 pp.)
82-81 "Ion Implantation of Si in Be-Implanted In_0.53Ga_0.47As," A.N.M.M. Choudhury, N. J. Slater, K. Tabatabaie-Alavi, and C. G. Fonstad, March 1982.(10 pp.)
82-82 "Ion Implantation of Be in In In_0.53Ga_0.47As," K. Tabatabaie-Alavi, A.N.M.M. Choudhury, N. J. Slater, and C. G. Fonstad, March 1982. (14 pp.)
82-83 "Very Low Resistance Ohmic Contacts on p-type InP by Direct Plating." K. Tabatabaie-Alavi, A.N.M.M. Choudhury, N. J. Slater, and C. G. Fontad, March 1982 (13 pp.)
82-84 "An Iterative Solution to Poisson's Equation for Doped Heterostructure Devices," James Cheming Ong, March 1982. (46 pp.)
82-85 "MOS Implementations of TTL Architectures: A Case Study," William H. Evans and Jonathan Allen, March 1982. (4 pp.)
82-86 "Minimizing the Longest Edge in a VLSI Layout," Sandeep N. Bhatt and Charles E. Leiserson, March 1982 (9 pp.)
82-87 "How to Assemble Tree Machines," Sandeep N. Bhatt and Charles E. Leiserson, March 1982. (8 pp.)
82-88 "A Layout Strategy for VLSI Which is Provably Good," Frank Thomson Leighton, March 1982 (14 pp.)
82-89 "New Lower Bound Techniques for VLSI," Frank Thomson Leighton, March 1982. (30 pp.)
82-90 "Optimizing Synchronous Systems," Charles E. Leiserson and James B. Saxe, March 1982. (24 pp.)
82-91 "A Hardware Assisted Design Rule Check Architecture," Larry Seiler, April 1982. (7 pp.)
82-92 "Plasma-Assisted Chemical Vapor Deposition of Crystalline Silicon," T. J. Donahue, R. Reif and W. R. Burger, April 1982. (3 pp.)
82-93 "Phosphorus Incorporation During Silicon Epitaxial Growth in a CVD Reactor," R. Reif April 1982. (34 pp.)
82-94 "Small is Big: The Microelectronic Challenge," Paul Penfield, Jr., April 1982. (15 pp.)
82-95 "Orientation Selection by Zone Melting Silicon Films through Planar Constrictions," Henry I. Smith, H. A. Atwater and M. W. Geis, April 1982. (2 pp.)
82-96 "The Mechanism of Orientation in Si Graphoepitaxy Using a Strip-Heater Oven," Henry I. Smith and M. W. Geis, April 1982. (2 pp.)
82-97 "An Etch Pit Technique for Analyzing Crystallographic Orientation in Si Films," K. A. Bezjian, Henry I. Smith, J. M. Carter and M. W. Geis, April 1982. (10 pp.)
82-98 "Optimal Layer Assignment for Interconnect," Ron Y. Pinter, April 1982. (9 pp.)
82-99 "On Routing Two-Point Nets Across a Channel," Ron Y. Pinter, April 1982. (9 pp.)
82-100 "Digital Circuit Optimization," Charles E. Leiserson, Flavio M. Rose, and James B. Saxe, April 1982. (17 pp.)
82-101 "Wafer-Scale Integration of Systolic Arrays," Frank Thomson Leighton and Charles E. Leiserson, April 1982. (29 pp.)
82-102 "Three-Dimensional Circuit Layouts," Frank Thomson Leighton and Arnold L. Rosenberg, April 1982. (13 pp.)
82-103 "Layouts for the Shuffle-Exchange Graph and Lower Bound Techniques for VLSI," Frank Thomson Leighton, June 1982. (105 pp.)
82-104 "Exploiting Hierarchy in the Analysis of VLSI Systems," Daniel Wayne Weise, June 1982. (65 pp.)
82-105 "Implementation of a Displacement Processor Data Path," Brian C. Williams June 1982. (38 pp.)
82-106 "An Application of Number Theory to the Organization of Raster-Graphics Memory," Benny Chor, Charles E. Leiserson, Ronald L. Rivest, June 1982. (15 pp.)
82-107 "VLSI Micro-Cell Layout Automation," Aki Fujimura, June 1982. (216 pp.)
82-108 "Schematic Diagram Plotter," Carol J. Chiang, June 1982. (26 pp.)
82-109 "The Structural Crisis of American Microelectronics: Analysis and Policy Implications," Charles H. Ferguson, June 1982. (36 pp.)
82-110 "Layouts for the Shuffle-Exchange Graph Based on the Complex Plane Diagram," Frank Thomson Leighton, Margaret Lepley and Gary L. Miller, July 1982. (21 pp.)
82-111 "A Functional Tester Design for the University Environment," Mark Sherred, July 1982. (36 pp.)
82-112 "User's Guide to NET, PRESIM, and RNL/NL," Christopher J. Terman, July 1982. (45 pp.)
82-113 "Deep-UV Spatial-Period-Division Using An Excimer Laser," A. M. Hawryiuk, H. I. Smith, R. M. Osgood, and D. J. Erlich“, July 1982. (10 pp.)
82-114 "Models for VLSI Circuits," F. M. Rose, July 1982 (47 pp.)
82-115 "VLSI Circuit Theory," L. A. Glasser, and P. Penfield, Jr., August 1982 (3 pp.)
82-116 "Automated Calculation of Device Sizes for Digital IC Designs" Lennox P. John Hoyte, September 1982. (59 pp.)
82-117 "Introductory CMOS Techniques," Lance A. Glasser, and William S. Song, September 1982. (28 pp.)
82-118 "Orientation Selection by Zone Melting Silicon Films Through Planar Constrictions," H. A. Atwater, H. L. Smith, and M. W. Geis, September 1982. (14 pp.)
82-119 "Optimal Tile Salvage," Francine Berman, Frank Thomson Leighton, and Lawrence Snyder, September 1982. (21 pp.)
82-120 "An MOS LSI Digital Signal Processor for Speech Synthesis Applications," William Hall Evans, October 1982. (158 pp.)
82-121 "Electrical Parameter Extraction of MOSFETs Fabricated on Silicon-on-Insulator Films Using a Numerical Solution of Poisson's Equation," Yannick L. Le Coz,November 1982. (88 pp.)
82-122 "Ion Implantation of Be and Si for GaInAs/AlInAs/InP Bipolar Heterojunction Transistors," Nancy Jean Slater, November 1982. (142 pp.)
82-123 "(In,Ga)As/(In,Al)As Heterojunction Lateral PNP Transistors," K Tabatabaie-Alavi, A.N.M.M. Choudhury, K.Alavi, J. Vlcek, N. J. Slater, C. G. Fonstad, and A. Y. Cho, November 1982. (4 pp.)
82-124 "Ion-Implanted In_0.53Ga_0.47As/In_0.52Al_0.49As Lateral PNP Transistors," K. Tabatabaie-Alavi, A.N.M.M. Choudhury, K. Alavi, J. Vlcek, N. J. Slater, C. G. Fonstad, and A. Y. Cho, November 1982. (10 pp.)
82-125 "Ion Implantation Doping if (In,Ga)As and (In,Al)As," K. Tabatabaie-Alavi, A.N.M.M. Choudhury, K. Alavi, J. Vlcek, N. J. Slater, C. G. Fonstad, A. Y. Cho, and W. Rowe, November 1982. (8 pp.)
82-126 "The Sensitivity of Inverter Delay to Details of the Input Waveform: A Variational Approach," J. L. Wyatt, November 1982. (9 pp.)
82-127 "Inequality Theorems for Nonlinear Differential Equations," J. L. Wyatt, November 1982. (12 pp.)
82-128 "Monotone Behavior of Nonlinear RC Meshes," J. L Wyatt, November 1982. (12 pp.)
82-129 "An Approximation Algorithm for Manhattan Routing," B. S. Baker, S. N. Bhatt, and F. T. Leighton, December 1982. (16 pp.)
82-130 "The Impact of Layer Assignment Methods on Layout Algorithms for Integrated Circuits," Ron Yair Pinter, December 1982. (144 pp.)

83-131 "A Calibrated Digital Delay Line Implemented in VLSI," Jonathan D. Taft, January 1983. (58 pp.)
83-132 "Optimization of the MacPitts Silicon Compiler for Telecommunication Circuitry," J.R. Fox, January 1983. (21 pp.)
83-133 "Design of a Fully Associative Cache Memory Controller," John Chia Lin Hou, January 1983. (150 pp.)
83-134 "An Expert System for VLSI Design," Richard Zippel, February 1983. (3 pp.)
83-135 "The Design, Implementation and Testing of a Self-Timed Two by Two Packet Router," Tam-Anh Chu, February 1983. (41 pp.)
83-136 "On Bisecting Random Graphs," Thang Nguyen Bui, February 1983. (41 pp.)
83-137 Test Generation Algorithms: Overcoming the Von Neumann Bottleneck," Glenn A. Kramer, April 1983. (10 pp.)

The MIT Library has provided these files with permission for publication <pending> and I extend my utmost gratitude to the staff responsible for the processing, retrieval and scanning of these documents.

This website would not be possible without them.

From Distinctive Collections; <pending>, and from the Imaging Lab; <pending>.